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d a t a sh eet product speci?cation supersedes data of 2003 nov 17 2004 jan 23 integrated circuits 74lvc257a quad 2-input multiplexer with 5 v tolerant inputs/outputs; 3-state
2004 jan 23 2 philips semiconductors product speci?cation quad 2-input multiplexer with 5 v tolerant inputs/outputs; 3-state 74lvc257a features 5 v tolerant inputs/outputs, for interfacing with 5 v logic wide supply voltage range from 1.2 to 3.6 v cmos low-power consumption direct interface with ttl levels output drive capability 50 w transmission lines at 85 c complies with jedec standard no. 8-1a esd protection: hbm eia/jesd22-a114-a exceeds 2000 v mm eia/jesd22-a115-a exceeds 200 v specified from - 40 to +85 c and - 40 to +125 c. description the 74lvc257a is a high-performance, low-power, low-voltage, si-gate cmos device and superior to most advanced cmos compatible ttl families. inputs can be driven from either 3.3 or 5.0 v devices. in 3-state operation, outputs can handle 5 v. this feature allows the use of these devices as translators in a mixed 3.3 and 5 v environment. the 74lvc257a is a quad 2-input multiplexer with 3-state outputs, which select 4 bits of data from two sources and are controlled by a common data select input (pin s). the data inputs from source 0 (pins 1i0 to 4i0) are selected when pin s is low and the data inputs from source 1 (pins 1i1 to 4i1) are selected when pin s is high. data appears at the outputs (pins 1y to 4y) in true (non-inverting) form from the selected inputs. the 74lvc257a is the logic implementation of a 4-pole, 2-position switch, where the position of the switch is determined by the logic levels applied to pin s. the outputs are forced to a high-impedance off-state when pin oe is high. quick reference data gnd = 0 v; t r =t f 2.5 ns; t amb =25 c. notes 1. c pd is used to determine the dynamic power dissipation (p d in m w). p d =c pd v cc 2 f i n+ s (c l v cc 2 f o ) where: f i = input frequency in mhz; f o = output frequency in mhz; c l = output load capacitance in pf; v cc = supply voltage in volts; n = total load switching outputs; s (c l v cc 2 f o ) = sum of the outputs. 2. the condition is v i = gnd to v cc . symbol parameter conditions typical unit t phl /t plh propagation delay ni0, ni1 to ny c l = 50 pf; v cc = 3.3 v 2.9 ns propagation delay s to ny c l = 50 pf; v cc = 3.3 v 3.2 ns t pzh /t pzl 3-state output enable time oe to ny c l = 50 pf; v cc = 3.3 v 3.7 ns t phz /t plz 3-state output disable time oe to ny c l = 50 pf; v cc = 3.3 v 3.2 ns c i input capacitance 5.0 pf c pd power dissipation capacitance per gate v cc = 3.3 v; notes 1 and 2 outputs enabled 16 pf outputs disabled 7.0 pf
2004 jan 23 3 philips semiconductors product speci?cation quad 2-input multiplexer with 5 v tolerant inputs/outputs; 3-state 74lvc257a function table see note 1. note 1. h = high voltage level; l = low voltage level; x = dont care; z = high-impedance off-state. ordering information input output oe s ni0 ni1 ny hxxxz lhxll lhxhh lllxl l lhxh type number temperature range package pins package material code 74lvc257ad - 40 to +125 c 16 so16 plastic sot109-1 74lvc257adb - 40 to +125 c 16 ssop16 plastic sot338-1 74lvc257apw - 40 to +125 c 16 tssop16 plastic sot403-1 74LVC257ABQ - 40 to +125 c 16 dhvqfn16 plastic sot763-1
2004 jan 23 4 philips semiconductors product speci?cation quad 2-input multiplexer with 5 v tolerant inputs/outputs; 3-state 74lvc257a pinning pin symbol description 1 s common data select input 2 1i0 data input from source 0 3 1i1 data input from source 1 4 1y 3-state multiplexer output 5 2i0 data input from source 0 6 2i1 data input from source 1 7 2y 3-state multiplexer output 8 gnd ground (0 v) 9 3y 3-state multiplexer output 10 3i1 data input from source 1 11 3i0 data input from source 0 12 4y 3-state multiplexer output 13 4i1 data input from source 1 14 4i0 data input from source 0 15 oe 3-state output enable input (active low) 16 v cc supply voltage handbook, halfpage s 1i0 1i1 1y 2i0 2i1 2y gnd v cc oe 4i0 4i1 3i0 3i1 4y 3y 1 2 3 4 5 6 7 8 16 15 14 13 12 11 10 9 mna864 257a fig.1 pin configuration so16 and (t)ssop16. fig.2 pin configuration dhvqfn16. (1) the die substrate is attached to this pad using conductive die attach material. it can not be used as a supply pin or input. handbook, halfpage 116 gnd (1) s v cc 8 2 3 4 5 7 1i0 1i1 1y 2i0 2i1 15 14 13 12 10 611 9 gnd top view mdb198 2y 3y 3i1 3i0 4y 4i1 4i0 oe
2004 jan 23 5 philips semiconductors product speci?cation quad 2-input multiplexer with 5 v tolerant inputs/outputs; 3-state 74lvc257a handbook, halfpage mna865 1i0 1i1 2i0 2i1 3i0 3i1 4i0 4i1 s 4y 3y 2y 1y 115 4 7 9 12 2 3 5 6 11 10 14 13 oe fig.3 logic symbol. handbook, halfpage mna866 12 9 7 4 1 g1 15 en mux 1 1 13 14 10 11 6 5 3 2 fig.4 logic symbol (ieee/iec). handbook, halfpage mna868 3-state multi- plexer outputs selector 1y 2y 3y 4y 12 9 7 4 1i0 1i1 2i0 2i1 3i0 3i1 4i0 4i1 s oe 13 1 15 14 10 11 6 5 3 2 fig.5 functional diagram. handbook, halfpage 1i0 oe s 1i1 2i0 2i1 3i0 3i1 4i0 4i1 4y 3y 2y 1y mna867 fig.6 logic diagram.
2004 jan 23 6 philips semiconductors product speci?cation quad 2-input multiplexer with 5 v tolerant inputs/outputs; 3-state 74lvc257a recommended operating conditions limiting values in accordance with the absolute maximum rating system (iec 60134); voltages are referenced to gnd (ground = 0 v). notes 1. the input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. for so16 packages: above 70 c derate linearly with 8 mw/k. for ssop16 and tssop16 packages: above 60 c derate linearly with 5.5 mw/k. for dhvqfn16 packages: above 60 c derate linearly with 4.5 mw/k. symbol parameter conditions min. max. unit v cc supply voltage for maximum speed performance 2.7 3.6 v for low-voltage applications 1.2 3.6 v v i input voltage 0 5.5 v v o output voltage high or low state 0 v cc v 3-state 0 5.5 v t amb operating ambient temperature in free air - 40 +125 c t r , t f input rise and fall times v cc = 1.2 to 2.7 v 0 20 ns/v v cc = 2.7 to 3.6 v 0 10 ns/v symbol parameter conditions min. max. unit v cc supply voltage - 0.5 +6.5 v i ik input diode current v i <0 -- 50 ma v i input voltage note 1 - 0.5 +6.5 v i ok output diode current v o >v cc or v o <0 - 50 ma v o output voltage high or low state; note 1 - 0.5 v cc + 0.5 v 3-state; note 1 - 0.5 +6.5 v i o output source or sink current v o =0tov cc - 50 ma i cc , i gnd v cc or gnd current - 100 ma t stg storage temperature - 65 +150 c p tot power dissipation t amb = - 40 to +125 c; note 2 - 500 mw
2004 jan 23 7 philips semiconductors product speci?cation quad 2-input multiplexer with 5 v tolerant inputs/outputs; 3-state 74lvc257a dc characteristics at recommended operating conditions; voltages are referenced to gnd (ground = 0 v). symbol parameter test conditions min. typ. max. unit other v cc (v) t amb = - 40 to +85 c ; note 1 v ih high-level input voltage 1.2 v cc -- v 2.7 to 3.6 2.0 -- v v il low-level input voltage 1.2 -- gnd v 2.7 to 3.6 -- 0.8 v v oh high-level output voltage v i =v ih or v il i o = - 100 m a 2.7 to 3.6 v cc - 0.2 v cc (2) - v i o = - 12 ma 2.7 v cc - 0.5 -- v i o = - 18 ma 3.0 v cc - 0.6 -- v i o = - 24 ma 3.0 v cc - 0.8 -- v v ol low-level output voltage v i =v ih or v il i o = 100 m a 2.7 to 3.6 - gnd (2) 0.2 v i o =12ma 2.7 -- 0.4 v i o =24ma 3.0 -- 0.55 v i li input leakage current v i = 5.5 v or gnd 3.6 - 0.1 5 m a i oz 3-state output off-state current v i =v ih or v il ; v o = 5.5 v or gnd 3.6 - 0.1 5 m a i off power-off leakage supply v i or v o = 5.5 v 0.0 - 0.1 10 m a i cc quiescent supply current v i =v cc or gnd; i o =0 3.6 - 0.1 10 m a d i cc additional quiescent supply current per pin v i =v cc - 0.6 v; i o =0 2.7 to 3.6 - 5 (2) 500 m a
2004 jan 23 8 philips semiconductors product speci?cation quad 2-input multiplexer with 5 v tolerant inputs/outputs; 3-state 74lvc257a notes 1. all typical values are measured t amb =25 c. 2. these typical values are measured at v cc = 3.3 v. t amb = - 40 to +125 c v ih high-level input voltage 1.2 v cc -- v 2.7 to 3.6 2.0 -- v v il low-level input voltage 1.2 -- 0v 2.7 to 3.6 -- 0.8 v v oh high-level output voltage v i =v ih or v il i o = - 100 m a 2.7 to 3.6 v cc - 0.3 -- v i o = - 12 ma 2.7 v cc - 0.65 -- v i o = - 18 ma 3.0 v cc - 0.75 -- v i o = - 24 ma 3.0 v cc - 1 -- v v ol low-level output voltage v i =v ih or v il i o = 100 m a 2.7 to 3.6 -- 0.3 v i o =12ma 2.7 -- 0.6 v i o =24ma 3.0 -- 0.8 v i li input leakage current v i = 5.5 v or gnd 3.6 -- 20 m a i oz 3-state output off-state current v i =v ih or v il ; v o = 5.5 v or gnd 3.6 -- 20 m a i off power-off leakage supply v i or v o = 5.5 v 0.0 -- 20 m a i cc quiescent supply current v i =v cc or gnd; i o =0 3.6 -- 40 m a d i cc additional quiescent supply current per pin v i =v cc - 0.6 v; i o =0 2.7 to 3.6 -- 5000 m a symbol parameter test conditions min. typ. max. unit other v cc (v)
2004 jan 23 9 philips semiconductors product speci?cation quad 2-input multiplexer with 5 v tolerant inputs/outputs; 3-state 74lvc257a ac characteristics gnd = 0 v; t r =t f 2.5 ns; c l = 50 pf; r l = 500 w . notes 1. all typical values are measured t amb =25 c. 2. these typical values are measured at v cc = 3.3 v. 3. skew between any two outputs of the same package switching in the same direction. this parameter is guaranteed by design. symbol parameter test conditions min. typ. max. unit waveforms v cc (v) t amb = - 40 to +85 c ; note 1 t phl /t plh propagation delay ni0, ni1 to ny see figs 7 and 9 1.2 - 16 - ns 2.7 1.0 3.0 5.4 ns 3.0 to 3.6 1.0 2.9 (2) 4.6 ns propagation delay s to ny see figs 7 and 9 1.2 - 18 - ns 2.7 1.0 3.6 7.5 ns 3.0 to 3.6 1.0 3.2 (2) 6.4 ns t pzh /t pzl 3-state output enable time oe to ny see figs 8 and 9 1.2 - 15 - ns 2.7 1.5 3.6 6.7 ns 3.0 to 3.6 1.0 3.7 (2) 5.6 ns t phz /t plz 3-state output disable time oe to ny see figs 8 and 9 1.2 - 8 - ns 2.7 1.5 3.1 4.7 ns 3.0 to 3.6 1.0 3.2 (2) 4.3 ns t sk(0) skew note 3 3.0 to 3.6 -- 1.0 ns t amb = - 40 to +125 c t phl /t plh propagation delay ni0, ni1 to ny see figs 7 and 9 1.2 --- ns 2.7 1.0 - 7.0 ns 3.0 to 3.6 1.0 - 6.0 ns propagation delay s to ny see figs 7 and 9 1.2 --- ns 2.7 1.0 - 9.5 ns 3.0 to 3.6 1.0 - 8.0 ns t pzh /t pzl 3-state output enable time oe to ny see figs 8 and 9 1.2 --- ns 2.7 1.5 - 8.5 ns 3.0 to 3.6 1.0 - 7.0 ns t phz /t plz 3-state output disable time oe to ny see figs 8 and 9 1.2 --- ns 2.7 1.5 - 6.0 ns 3.0 to 3.6 1.0 - 5.5 ns t sk(0) skew note 3 3.0 to 3.6 -- 1.5 ns
2004 jan 23 10 philips semiconductors product speci?cation quad 2-input multiplexer with 5 v tolerant inputs/outputs; 3-state 74lvc257a ac waveforms handbook, halfpage mna869 s, nl0, nl1 input ny output t phl t plh gnd v cc v m v m v oh v ol v ol and v oh are typical output voltage drop that occur with the output load. v cc v m input v i t r =t f 1.2 v 0.5 v cc v cc 2.5 ns 2.7 v 1.5 v 2.7 v 2.5 ns 3.0 to 3.6 v 1.5 v 2.7 v 2.5 ns fig.7 input (s, ni0 and ni1) to output (ny) propagation delays. handbook, full pagewidth mna870 t plz t phz output disabled output enabled v y v x output enabled output low-to-off off-to-low output high-to-off off-to-high oe input v ol v oh v cc v i v m gnd gnd t pzl t pzh v m v m fig.8 3-state enable and disable times. v ol and v oh are typical output voltage drop that occur with the output load. v cc v m input v i t r =t f 1.2 v 0.5 v cc v cc 2.5 ns 2.7 v 1.5 v 2.7 v 2.5 ns 3.0 to 3.6 v 1.5 v 2.7 v 2.5 ns v x =v ol + 0.3 v at v cc 3 2.7 v; v x =v ol + 0.1 v at v cc < 2.7 v; v y =v oh - 0.3 v at v cc 3 2.7 v; v y =v oh - 0.1 v at v cc < 2.7 v.
2004 jan 23 11 philips semiconductors product speci?cation quad 2-input multiplexer with 5 v tolerant inputs/outputs; 3-state 74lvc257a handbook, full pagewidth v ext v cc v i v o mna616 d.u.t. c l r t r l r l pulse generator fig.9 load circuitry for switching times. definitions for test circuits: r l = load resistor. c l = load capacitance including jig and probe capacitance. r t = termination resistance should be equal to the output impedance z o of the pulse generator. note 1. the circuit performs better when r l = 1000 w . v cc v i c l r l v ext t plh /t phl t pzh /t phz t pzl /t plz 1.2 v v cc 50 pf 500 w (1) open gnd 2 v cc 2.7 v 2.7 v 50 pf 500 w open gnd 2 v cc 3.0 to 3.6 v 2.7 v 50 pf 500 w open gnd 2 v cc
2004 jan 23 12 philips semiconductors product speci?cation quad 2-input multiplexer with 5 v tolerant inputs/outputs; 3-state 74lvc257a package outlines x w m q a a 1 a 2 b p d h e l p q detail x e z e c l v m a (a ) 3 a 8 9 1 16 y pin 1 index unit a max. a 1 a 2 a 3 b p cd (1) e (1) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm inches 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 0.7 0.6 0.7 0.3 8 0 o o 0.25 0.1 dimensions (inch dimensions are derived from the original mm dimensions) note 1. plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. 1.0 0.4 sot109-1 99-12-27 03-02-19 076e07 ms-012 0.069 0.010 0.004 0.057 0.049 0.01 0.019 0.014 0.0100 0.0075 0.39 0.38 0.16 0.15 0.05 1.05 0.041 0.244 0.228 0.028 0.020 0.028 0.012 0.01 0.25 0.01 0.004 0.039 0.016 0 2.5 5 mm scale so16: plastic small outline package; 16 leads; body width 3.9 mm sot109-1
2004 jan 23 13 philips semiconductors product speci?cation quad 2-input multiplexer with 5 v tolerant inputs/outputs; 3-state 74lvc257a unit a 1 a 2 a 3 b p cd (1) e (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm 0.21 0.05 1.80 1.65 0.25 0.38 0.25 0.20 0.09 6.4 6.0 5.4 5.2 0.65 1.25 7.9 7.6 1.03 0.63 0.9 0.7 1.00 0.55 8 0 o o 0.13 0.2 0.1 dimensions (mm are the original dimensions) note 1. plastic or metal protrusions of 0.25 mm maximum per side are not included. sot338-1 99-12-27 03-02-19 (1) w m b p d h e e z e c v m a x a y 1 8 16 9 q a a 1 a 2 l p q detail x l (a ) 3 mo-150 pin 1 index 0 2.5 5 mm scale ssop16: plastic shrink small outline package; 16 leads; body width 5.3 mm sot338-1 a max. 2
2004 jan 23 14 philips semiconductors product speci?cation quad 2-input multiplexer with 5 v tolerant inputs/outputs; 3-state 74lvc257a unit a 1 a 2 a 3 b p cd (1) e (2) (1) eh e ll p qz y w v q references outline version european projection issue date iec jedec jeita mm 0.15 0.05 0.95 0.80 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 0.4 0.3 0.40 0.06 8 0 o o 0.13 0.1 0.2 1 dimensions (mm are the original dimensions) notes 1. plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. plastic interlead protrusions of 0.25 mm maximum per side are not included. 0.75 0.50 sot403-1 mo-153 99-12-27 03-02-18 w m b p d z e 0.25 18 16 9 q a a 1 a 2 l p q detail x l (a ) 3 h e e c v m a x a y 0 2.5 5 mm scale tssop16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm sot403-1 a max. 1.1 pin 1 index
2004 jan 23 15 philips semiconductors product speci?cation quad 2-input multiplexer with 5 v tolerant inputs/outputs; 3-state 74lvc257a terminal 1 index area 0.5 1 a 1 e h b unit y e 0.2 c references outline version european projection issue date iec jedec jeita mm 3.6 3.4 d h 2.15 1.85 y 1 2.6 2.4 1.15 0.85 e 1 2.5 0.30 0.18 0.05 0.00 0.05 0.1 dimensions (mm are the original dimensions) sot763-1 mo-241 - - - - - - 0.5 0.3 l 0.1 v 0.05 w 0 2.5 5 mm scale sot763-1 dhvqfn16: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 16 terminals; body 2.5 x 3.5 x 0.85 mm a (1) max. a a 1 c detail x y y 1 c e l e h d h e e 1 b 27 15 10 9 8 1 16 x d e c b a terminal 1 index area a c c b v m w m e (1) note 1. plastic or metal protrusions of 0.075 mm maximum per side are not included. d (1) 02-10-17 03-01-27
2004 jan 23 16 philips semiconductors product speci?cation quad 2-input multiplexer with 5 v tolerant inputs/outputs; 3-state 74lvc257a data sheet status notes 1. please consult the most recently issued data sheet before initiating or completing a design. 2. the product status of the device(s) described in this data sheet may have changed since this data sheet was published. the latest information is available on the internet at url http://www.semiconductors.philips.com. 3. for data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. level data sheet status (1) product status (2)(3) definition i objective data development this data sheet contains data from the objective speci?cation for product development. philips semiconductors reserves the right to change the speci?cation in any manner without notice. ii preliminary data quali?cation this data sheet contains data from the preliminary speci?cation. supplementary data will be published at a later date. philips semiconductors reserves the right to change the speci?cation without notice, in order to improve the design and supply the best possible product. iii product data production this data sheet contains data from the product speci?cation. philips semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. relevant changes will be communicated via a customer product/process change noti?cation (cpcn). definitions short-form specification ? the data in a short-form specification is extracted from a full data sheet with the same type number and title. for detailed information see the relevant data sheet or data handbook. limiting values definition ? limiting values given are in accordance with the absolute maximum rating system (iec 60134). stress above one or more of the limiting values may cause permanent damage to the device. these are stress ratings only and operation of the device at these or at any other conditions above those given in the characteristics sections of the specification is not implied. exposure to limiting values for extended periods may affect device reliability. application information ? applications that are described herein for any of these products are for illustrative purposes only. philips semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. disclaimers life support applications ? these products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. philips semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify philips semiconductors for any damages resulting from such application. right to make changes ? philips semiconductors reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. when the product is in full production (status production), relevant changes will be communicated via a customer product/process change notification (cpcn). philips semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
? koninklijke philips electronics n.v. 2004 sca76 all rights are reserved. reproduction in whole or in part is prohibited without the prior written consent of the copyright owne r. the information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. no liability will be accepted by the publisher for any consequence of its use. publication thereof does not con vey nor imply any license under patent- or other industrial or intellectual property rights. philips semiconductors C a worldwide company contact information for additional information please visit http://www.semiconductors.philips.com . fax: +31 40 27 24825 for sales of?ces addresses send e-mail to: sales.addresses@www.semiconductors.philips.com . printed in the netherlands r20/04/pp 17 date of release: 2004 jan 23 document order number: 9397 750 12697

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